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Course
Title: Analogue IC Design training using the new ams-OSRAM CMOS 180 nm technology (compatible to TSMC 180nm) - in-person training
Start Date: 20-Oct-2026
End Date: 21-Oct-2026
Time: Day1: 09:00 to 16:30 and Day2: 09:00 to 15:00 (local time)
Location: CIME-P, Grenoble, France
Presenters: ams OSRAM Staff
Cost: 150.00 EURO
Closing Date: Registration closes 12-Oct-2026 or earlier when places are filled.
Overview:

This training course offers an introduction to the analog design flow and simulation with the ams tC18 PDK
Details:

The goal of this course is not only to provide all attendees with fundamental information about the analog chip design flow with the ams tC18 PDK, but to gain hands-on experience with the schematic, layout and simulation tools. The attendees learn and experience on multiple examples the importance of placement, routing and simulation parameters. The step-by-step introduction of new processes from theory to applications makes this course especially attractive for less experienced chip designers.


The concepts presented will be illustrated with hands-on practial sessions using Cadence tools.


The course schedule:

  • Day 1
    • ams-Osram and FSF overview
    • Technology TC18 and PDK introduction
    • Analog Schematic and simulation
    • Corner and Monte Carlo Simulation
    • Analog Layout
  • Day 2
    • Analog Layout (continued)
    • Analog Layout – Verification
    • Digital Design Flow &: Tools overview
    • Questions and answers
Prerequisites:

All attendees must have a valid NDA with ams OSRAM. A basic knowledge and understanding of Cadence Virtuoso design tools is recommended.