This intensive 2-day workshop is designed to provide participants with a deep dive into the TSMC N16 PDK (specifically N16ADFP - Academic Design Foster Package), including a comprehensive understanding of FinFET Devices.

The course will cover theoretical foundations of the N16 technology, practical design strategies, and implementation in Analogue and Digital design flows. We will use N16ADFP (Academic Design Foster Package), which is meant for teaching purposes only (not for shuttle tapeout, nor for commercial use).

Participants will engage with experts who will outline the core principles of the TSMC N16 FinFET technology. Hands-on sessions will allow attendees to apply the PDK principles using industry-standard tools from Cadence.

Course program outline

Day 1: Focus on the analogue flow. Speaker: Sara Louahdi (imec)

• Introduction to the Europractice platform and imec.IC-Link
• N16 FinFET Technology:
  • Dive into the fundamentals of FinFET devices and their position in the scaling roadmap
  • Learning about the parametrised cell (pCell) and how it should be used within an IC design flow

• Circuit Design:
  • Schematic Design Entry and Hierarchy
  • Circuit Simulation and Results

• Layout Design:
  • Layout Fundamentals
  • Schematic Driven Layout
  • Layout Verification (DRC, LVS)

Day 2: Focus on the digital design flow and physical implementation through the theory and hands-on sessions. Speakers: Ilse Vos(imec), Moez Hamlaoui (imec)

• PDK & Tech file:
  • Description of the content of the Design Kit and the design flow.

• Logical and Physical Synthesis Flows:
  • Hands-on sessions on how to utilise the PDK in digital flow using Cadence Electronic Design Automation (EDA) tools. These sessions will provide participants with the opportunity to apply their EDA tool experience in practical scenarios
  • Verilog/VHDL RTL Code
  • Logic Synthesis
  • Floorplaning & Placement
  • CTS & Routing
  • Layout Finishing & GDSII

Participants should have a good understanding of standard analogue & digital design. This workshop is suitable for students who are actively enrolled at universities and have an interest in advanced semiconductor technology. Prior knowledge in the field is beneficial.

Please note: Before attending this course all participants should have signed the appropriate FinFET ADFP NDA. Staff from imec will guide you through the NDA procedure. However, the NDA process and TSMC approval can take up to one month to complete. Please email tsmcfinfetprogram@imec.be stating that you want to get access to ADFP for this training.