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|Xilinx Hardware from Digilent||SDSoC||Nexsys Video|
|Xilinx Licensing||Partial Reconfiguration||Genesys 2|
|Xilinx Hardware and Software Ordering|
The Microelectronics Support Centre is pleased to announce the availability of several new products within the Xilinx portfolio:
SDSoc Tools – The software defined SoC flow that takes a software project running on the Zynq and allows you to move parts of the design into the FPGA fabric as a hardware accelerator. With next generation Zynq parts already announced this flow will enable the development of large SoC systems from a C/C++ description.
STFC Rutherford Appleton Laboratory is hosting a two day workshop on SDSoc on 23rd-24th June 2016 . The workshop is free of charge but delegates must finance make their own travel and accommodation arrangements. For the agenda and details on how to register, please see the Event Booking Page.
Partial Reconfiguration – The Xilinx optional tool that allows you to reconfigure part of your FPGA while the rest continues to run. This is an advanced flow, it is recommended that you download the training materials made available by the Xilinx University Program before using the tool.
Xilinx is a leading provider of FPGA (Field Programmable Gate Arrays) devices, and provide a comprehensive suite of development tools for FPGA design and development.
The latest Xilinx Xirtex-7 devices (pictured right), are built on a 28nm process and provide up to 2M logic cells, integrated Block RAM, dedicated DSP blocks, multiple gigabit transceivers, x8 PCIe.
Read more about the latest Xilinx devices on the Xilinx webpages
Download Xilinx Software
Xilinx Vivado Design Suite: System Edtion and ISE System Edition can be downloaded directly from the Xilinx website:
Download Xilinx Software
License delivery for Europractice sites
EUROPRACTICE site representatives can generate licenses directly from the Xilinx licensing website:
Generate Xilinx Licenses/Manage Users
Site Reps can also delegate responsibility for managing license from the licensing website by adding additional staff as license administrators.
Vivado was developed from the ground up to improve performance and usability, in particular for large modern FPGA designs. Vivado supports the Series 7 Xilinx devices (Virtex, Kintex, Artix) and beyond.
Vivado is recommended for new designs using these devices.
Also included is the Vivado HLS tool, which provides high level synthesis from C/C++/SystemC for series 7 Xilinx devices.
Users requiring support for older Xilinx devices can continue to use ISE indefinitely with current Europractice licenses.
Vivado HLx System Edition
Vivado is an Integrated Development Environment for Xilinx FPGA design. It supports core functionality including Simulation, Synthesis, Place and Route, and adds additional tools and features including Vivado High Level Synthesis, Power Optimization, ECO, and supports an incremental flow. Vivado also includes DSP development tools, Vivado in circuit logic analyser (ILA) and a software development environment that supports both the ARM processors in Zynq devices and Microblaze.
|Vivado HLS||Previously known as AutoESL, Vivado HLS is a High Level Synthesis tool, allowing synthesis of C/C++/SystemC to RTL.|
|Hardware Debug||Vivado ILA allows on-chip debug by providing visibility of internal FPGA signals, including embedded processor buses, for real time verification of FPGA designs.
IBERT allows Bit Error Rate Testing of integrated transceivers to a greater precision than using external scopes.
|SDK||SDK is a development environment for hardware/software co-design based around the ARM and MicroBlaze processor cores. A license for the 32-Bit MicroBlaze soft IP is also included as part of this package, which can be used with all Xilinx FPGA families.|
|System Generator for DSP||System Generator enables designers to develop high-performance DSP systems for Xilinx FPGAs using MATLAB and Simulink. System Generator, through Simulink, provides a graphical modelling environment for generation of bit-accurate models of FPGA circuits, and automatically generates synthesizable Hardware Description Language (HDL) code. A library of IP for use in Simulink is included with System Generator.|
Xilinx ISE System Edition packageISE System Edition contains a complete suite of FPGA development tools comprising design capture, synthesis, verification and implementation. It includes PlanAhead for IO pin planning, floor planning and design analysis, ChipScope Pro for on-chip debug, EDK and SDK for Embedded development, and System Generator, allowing generation of RTL from DSP designs using MATLAB and Simulink.
SDSoc is an optional add-on bundle to Vivado. SDSoC is a development environment that lets you take a program running on the Zynq and accelerate functions within that program by transferring them to the FPGA fabric. A set of performance and area estimation tools are included so that you can explore then benefits of turning the function into hardware and then an automatic generator that moves the function to hardware and generates all necessary interfaces between it and the program running on the Zynq. The software system can either be bare metal, Linux or FreeRTOS.
Board support packages are available for popular Zynq boards including the Zedboard and ZYBO.
Partial Reconfiguration is an optional add-on bundle to Vivado that allows blocks of logic within the FPGA to be modified dynamically while the rest of the logic continues to work as before. Partial reconfiguration is an advanced methodology that uses the non-project flow(i.e. Tcl rather than IDE). Partial reconfiguration is currently supported by all 7 series and Zynq devices and most of the UltraScale family. Partial Reconfiguration on the UltraScale family is more powerful still offering full reconfiguration of fixed blocks like Gigabit Transceivers.
Xilinx Hardware from Digilent
The ZedBoard is a low-cost development board for the Xilinx Zynq-7000. The board is based on the XC7Z020-CLG484 which combines FPGA fabric with a dual core ARM Cortex A9 processor The Zedboard comes with a 4 GB SD card, and boots Linux out of the box.
Resources on the board include: 512 MB DDR3 memory; 256 Mb Quad SPI Flash; 4 GB SD Card Included; 10/100/1000 Ethernet; USB OTG (Device/Host/OTG); USB UART; HDMI, VGA out; 128 x 32 OLED; 9 LEDs; 8 Dipswitches; 7 Push buttons.
The Nexys Video is a an Artix based board optimised for video projects featuring an HMDI sink and source as well as a Mini DisplayPort source. There’s also 512MB of DDR3 RAM on board and the usual USB and Ethernet connections.
The chip is an XC7A200T-1SBG484C with 33k logic slices, 13Mbits of fast block RAM, 740 DSP slices and four 3.75Gbps transceivers.
Please see this datasheet for more information.
For large and/or high speed designs, the Genesys 2 offers a large fast Kintex-7 device on a board with 1GB of DDR3 RAM and an FMC connector that brings out 10 of the FPGA’s 10.3Gbps GTX transceivers. The device has 50k logic slices, almost 16Mbit of on chip block RAM and 840 DSP slices. Note that this is the -2 commercial speed grade part, i.e. the faster fabric. Full details can be found here
For hardware and software prices, please see the Europractice Xilinx Price list
For further information on hardware, please contact the Microelectronics Support Centre MicroelectronicsCentre@stfc.ac.uk
Please note that the EUROPRACTICE Software Service aims to maintain a small stock of these boards for shipment on receipt of order. Sites ordering these boards should receive them ahead of any software being ordered.
Xilinx licenses are generated by the EUROPRACTICE site representative, or authorized user, through the Xilinx website. The site representative/authorized user can generate floating or node-locked license files as required from the pool of unallocated seats. It is not necessary to specify the type of license (floating/node locked) required when placing an order, only the number of seats required.
Please go to Generate Xilinx Licenses to manage your licenses.
The EUROPRACTICE Software Service place bulk orders with Vendors monthly. In order to be included on the monthly order, Institute orders to EUROPRACTICE must be received at RAL by no later than the 25th day of each month.
Detailed instructions on how to place a EUROPRACTICE software order, how to complete the order forms and the financial procedures that must be followed are given in the Software Order Procedures.
- Europractice Xilinx Software Form for Academic Institutes
- Europractice Xilinx Software Form for Research Laboratories
- Europractice Xilinx Hardware Order Form
- Europractice Xilinx Hardware and Software price list
- Europractice Xilinx Maintenance price list
- Europractice Software Order Procedures
Europractice supported Software Versions and Operating Systems
|The EUROPRACTICE Software Service is managed by the Microelectronics Support Centre, STFC Rutherford Appleton Laboratory, UK.
You can contact the Microelectronics Support Centre by email: MicroelectronicsCentre@stfc.ac.uk
Last modified: April 26, 2016