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Synopsys Custom Compiler Design Contest with Free 180nm Fabrication
The Microelectronics Support Centre at STFC Rutherford Appleton Laboratory is pleased to announce a Synopsys Custom Compiler Design Contest. The best 2 submissions will be given a free fabrication of either a TSMC 180nm or XFAB 180nm chip fabricated through the Europractice mini@sic program.
The Contest is open to all Europractice academic member (Axxxxx member number) institutes. Synopsys are seeking an innovative real-world design that exhibits the usage of Synopsys Custom Compiler and the mixed signal simulation platform (HSPICE, CustomSim, VCS-AMS). These tools are part of the Europractice/Synopsys Analogue Simulation and Modelling (ASM) bundle.
Designs will be judged by a committee of Synopsys technical staff. The 2 winners will be chosen based on originality, feasibility, manufacturability and how extensively and well the design has been done and verified with Synopsys products.
The selection criteria will be as follows:
- Functionality demonstrated through HSPICE/CustomSim simulations
- Optimal area of layout that is DRC/LVS clean
- Results that demonstrate close matching of given design specifications through pre-layout and post-layout simulations
- Effective use of design productivity features available within the Synopsys tool flow
The Final submission of the design description for those who have registered is due by December 7th 2017. The winners will be announced in January 2018 and then invited to submit their GDSII to the next available mini@sic run (TSMC 180nm or XFAB 180nm as appropriate).
STFC is running the practical training course: Introduction to Analogue IC Design, Simulation, Layout and Verification using the Synopsys Custom Compiler tool flow and the XFAB 180nm iPDK on 20th - 22nd March 2017 and on 24th - 26th April 2017. Further details and Registration…
The Microelectronics Support Centre is pleased to announce the inclusion of new tools and additional functionality with the 2017 license keys from Synopsys. Highlights include:
- Design Compiler Graphical now included in the Front End and Verification suite. Further details…
- ICC Advanced Geometry option now included in the Implementation Tools Suite .This add-on to IC Compiler offers a
fully featured design flow suitable for 20nm and larger geometries. However, universities working on more advanced
technology (14nm and below) can submit requests for additional Synopsys tools. Further
- Custom Compiler Advanced now included in the Analogue Simulation and Modelling
Suite. Further details…
- Plus other tools including DFTMAX LogicBIST, Verdi HW SW Debug and SaberES are also added to the relevant tool suites. Full details are provided in the tool suite descriptions below.
Users should contact their Europractice Representative for access to the 2016/2017 release, or the Microelectronics Support Centre if they do not know who their Europractice Representative is.
We have developed Easy-Install Kits corresponding to each of the Europractice Synopsys Tool Suites for the lnx86 platform. These Easy-Install Kits are released to all Europractice Synopsys customers and offer users and system administrators a time-saving and easier alternative route to update their installation of Synopsys tools. The benefits of using our Easy Install Kits include:
- 10x quicker installation compared to standard installs
- Minimal user interaction reduces scope for user installation error
- A known good software installation of all of the Synopsys Tool within each of the Synopsys Tool Suites
- Common directory structure that is easy to maintain and compatible with future versions
- Pre-configured scripts for end-user environment setup and license management
Easy-Install Kits are available to download from ftp://download.msc.rl.ac.uk/ within the Synopsys/versionyear_eda directory using your previously supplied login credentials. Europractice members who wish to continue with the standard installation process (from download of individual tools) may continue to do so and an update of Synopsys tools for the standard installation process can also be found on our FTP download server.
Full installation instructions are provided in PDF format within both the Easy-Install Kits and Standard Install directories.
Front End and Verification Suite (FEV)
The Front End and Verification suite includes a wide range of tools for verification and synthesis of digital designs for ASICs & FPGAs targets. The FEV suite includes RTL ASIC Synthesis (Verilog, SystemVerilog and VHDL), FPGA Synthesis and Multi-FPGA partitioning, test insertion and ATPG, logic simulation (VHDL, Verilog, SystemC, SystemVerilog, and SVA), logical equivalence checking, signoff timing analysis (with signal integrity), signoff power analysis, multi-voltage simulation, multi-voltage structural checking, and fast spice simulation. Full details of the FEV suite…
ASIC Implementation Suite (IMP)
The ASIC Implementation suite includes a range of tools for physical implementation of digital designs and physical design signoff. The ASIC Implementation suite includes tools for Physical implementation (Floorplanning, Placement, CTS, Routing, and Optimisation), RC extraction, DRC, LVS, Signoff Rail analysis. Full details of the ASIC Implementation Suite…
Analogue Simulation & Modelling Suite (ASM)
The Analogue Simulation and Modelling suite includes a wide range of tools for full-custom design, analogue circuit simulation and verification, and mechatronic system modelling. The ASM suite includes Custom Compiler for full custom design plus a range of Spice and Fast-Spice, RF simulation capabilities. The Saber tool, included within the ASM suite offers multi-domain modelling (with VHDL-AMS or MAST HDL) covering a wide range of physical systems (electrical, thermal, mechanical, magnetic, hydraulic, etc.), all integrated with schematic capture, simulation and results analysis. Full details of the Analogue Simulation and Modelling suite…
Advanced TCAD Suite (TCAD)
The Advanced TCAD suite provides an extensive set of tools for semiconductor process and device modelling, with and integrated analysis scenario exploration environment. The Advanced TCAD suite includes tools for; 2D/3D process simulation and modelling, structure definition, device simulation, compact model generation, and 2D/3D interconnect field solvers. Full details of the Advanced TCAD suite…
FPGA Suite (SFPGA)
The SFPGA suite provides tools for FPGA implementation and ASIC prototyping on FPGAs. The SFPGA suite is included within licenses of the FEV suite and is also available as a stand alone bundle for users who only need to target FPGA devices. Full details of the SFPGA suite…
Full details of Classroom Teaching Licenses…
Synopsys provide a range of online resources. These resources include curriculum materials, 90nm generic library, university newsletters and access to the other online resources as part of SolvNet.
SolvNet is Synopsys' on-line portal providing access to a wide range of technical resources for the Synopsys tools. SolvNet and these other on-line resources are restricted to authorised users of Synopsys tools and a password is required. Also included within Synopsys on-line resources for Universities is a 90nm, 32/28nm Generic Libraries. These libraries (Design Kits) are based on a typical 90nm, 32/28nm technologies and include typical cell contents. These libraries are well suited to undergraduate teaching of ASIC design with the Synopsys tools. Additionally, Synopsys also offer access to a wealth of Curriculum Materials on a wide variety of topics. These curriculum materials range from whole semester courses to shorter specific technical presentations and these may be used as courseware for teaching purposes by University members. Synopsys University Newsletters are published from time to time specifically for University users. These newsletters contain a variety of useful articles and information, a valid SolvNet username and password is required to access the full content of the articles within these newsletters.
|90nm, 32/28nm Generic Design Kits
How to Order
Orders are placed with the vendor on a single order, once per month. To be included in the current month's order, all documents including original ink-signed paper End User Agreements (if applicable) must be received by the Microelectronics Support Centre no later than the 25th day of the month.
Detailed instructions on how to place an order are given in our Order Procedures.
If you are interested in Synopsys Low-Cost Classroom Teaching Licenses please click here.
MANDATORY DOCUMENTS FOR ALL ORDERS
- Synopsys Order Form 1 copy, electronic copy via e-mail accepted, and
- Purchase Order 1 copy, electronic copy via e-mail accepted
MANDATORY DOCUMENTS FOR FIRST TIME ORDER FROM THIS VENDOR ONLY
- Synopsys End User Agreement for Academic Institutes TWO copies each with signatures in ink, electronic copies NOT accepted, paper originals must be sent to the Microelectronics Support Centre via courier recommended, see Order form for address, or
- Synopsys End User Agreement for Research Laboratories Instructions as per Agreement for Academic Institutes, and
- Synopsys Customer End Use Export Screening Checklist One copy with signature in ink, other instructions as per Agreement for Academic Institutes
STATEMENT FROM RESEARCH LABORATORIES
- End Usage Statement for Vendor Approval required when ordering first licenses of any new license bundle, 1 copy, electronic copy via e-mail accepted, can be sent in advance of other paperwork
PLEASE ENSURE that you read the End User Agreement Notes before downloading the End User Agreements.
|The EUROPRACTICE Software Service is managed by the Microelectronics Support Centre, STFC Rutherford Appleton Laboratory, UK.
You can contact the Microelectronics Support Centre by email: MicroelectronicsCentre@stfc.ac.uk
Last modified: March 6, 2017