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|FPGA & Board, Full Suite, and Olympus Place and Route||Catapult HLS||How to Order|
|Tanner Suite||PADS PCB|
January 2017. The Microelectronics Support Centre at STFC/RAL is pleased to announce the 2016/2017 Europractice/Mentor Graphics release.
The PADS PCB tools bundle is now available to purchase via the How to Order section below. PADS PCB incorporates schematic design, component management, analog and thermal analysis and PCB layout tools.
The Full Suite and FPGA & Board Design bundles have the following changes; enhanced SystemVerilog & VHDL editing capabilities in HDL Designer, Improved Questa simulation performance for mixed VHDL and SystemVerilog designs, improved platform support for the Xpedition PCB tools, and new Questa DDR4 verification IP.
The Tanner tools now support multiple testbenches, can save schematics into and OpenAccess database, and integrate with Eldo (From the Full Suite bundle) for RF Simulation.
The new Catapult release brings improved QOR and runtimes, improved datapath clustering, with enhanced clustering controls, and a new "Design Analyzer" tool to improve cross probing debugging during the architecture stage.
Other changes: Many of the new tools require the latest licensing software (FLEXnet v188.8.131.52), this can be found on our FTP Server. For a significant number of tools, this is the last release which supports RHEL5. The Tanner tools are now only available on the windows platform. Questa Codelink is no longer available.
Users should contact their Europractice Representative for access to the 2016/2017 release, or the Microelectronics Support Centre if they do not know who their Europractice Representative is.
FPGA & Board Design and Full Suite Bundles, including the Olympus Place and Route Option. PADS PCB, Catapult HLS and Tanner
The "FPGA & Board Design" bundle includes tools for; digital design and implementation in FPGAs, and PCB design (including multi-board design). Please note that ModelSim is now known as Questa.
For FPGA Designers it offers tools for; VHDL & Verilog design entry (schematic, spreadsheet, FSM, textual), HDL linting, VHDL & Verilog simulation (with code coverage and assertions), FPGA synthesis, FPGA IO assignment optimisation.
For PCB Designers it offers tools for; PCB schematic capture (hierarchical/multi-sheet), constraint entry, interactive layout, automatic constraint driven routing, simulation, signal integrity analysis (including GHz signals), power integrity (of power planes), PCB verification, performance exploration/optimisation, and symbolic timing analysis.
The "Full Suite" bundle contains all of the tools from the "FPGA & Board Design" bundle, with the addition of tools for; full custom IC design and analysis, mixed signal simulation, RF analysis, advanced digital design, modelling and verification.
For digital designers and system designers, it additionally offers tools for; advanced testbench automation, SystemVerilog UVM/OVM testbench creation and analysis, formal property checking (formal proof), clock domain crossing checking, verification planning, verification regression management, scan test insertion (and scan compression), boundary scan insertion, memory BIST insertion, ATPG, delay calculation, formal equivalence checking, multi-domain simulation (mixed mechanical and electrical simulation), SystemC TLM design/modelling, UML based model/code development, board EMC analysis to meet EMI regulations.
For analogue, RF and mixed signal designers, it offers tools for; Spice/fast-spice/mixed-signal simulation (Spice, Verilog-A/AMS, VHDL-AMS), Spice-RF analysis, Schematic capture, Simulation management (including montecarlo analysis), Layout editing, Schematic driven layout, Interactive DRC, Signoff DRC, LVS, RC Extraction, full 3D Electro-Magnetic (EM) simulation and optimisation (for RFIC, MMIC and antenna design), fast high capacity full-wave EM simulation (for complex antenna design, large RFICs or MMICs).
Included in this cost free orderable option are the Olympus SoC tools. Featuring multi-mode, multi-corner (MCMM) anaysis and optimization, this is a complete digital implementation place and route environment for advanced-node ICs and SoCs.
Please click on the above link for more information and details on how to request this option.
The Xpedition tools have for a number of years, and will continue to be, the premium PCB design tools from Mentor Graphics. In addition, the Mentor Graphics portfolio includes PADS, which might be easier to use in a teaching environment. PADS provides schematic design, component management, analog and thermal analysis and the PCB layout tools to produce designs in an easy-to-use environment. Through the Hyperlink technology, PADS enables both simple and complex designs incorporating Layout Rules Validation (DRC), Electromagnetic checks, Signal Integrity, Power Integrity, Manufacturability, and Thermal Compliance.
Catapult is a high level synthesis tool which enables the design of complex digital algorithms or systems (targeting ASICs or FPGAs) using C, C++ or SystemC. The greatly increased level of abstraction along with rapid micro-architectural exploration and refinement capabilities of Catapult offer both significant design productivity and verification efficiency benefits. The output of Catapult is synthesisable RTL VHDL or Verilog which can be integrated into your existing RTL flows.
The Tanner suite offers a complete solution for the design, layout and verification of analogue IC’s. It also integrates with other Mentor Graphics tools to offer mixed-signal and RF design flows, and integrates with third party products to offer MEMS design flows. The Tanner suite consists of fully-integrated analogue front end and back end tools, from schematic capture, circuit simulation, and waveform probing to physical layout and verification.
Please note: All new (or re-hosted) Europractice Tanner licenses are now generated using the Mentor Graphics FlexNet network licensing. This is the same network license daemon as is used by the other Mentor Graphics tools. The Mentor Graphics FlexNet license daemon supports both Windows and Linux for the license server OS. Note: It is no longer possible to get SentinelLM (Net-ID) based license files.
How to Order
Orders are placed with the vendor on a single order, once per month. To be included in the current month's order, all documents including original ink-signed paper End User Agreements (if applicable) must be received by the Microelectronics Support Centre no later than the 25th day of the month.
Detailed instructions on how to place an order are given in our Order Procedures.
MANDATORY DOCUMENTS FOR ALL ORDERS
- Mentor Graphics Order Form (login required) 1 copy, electronic copy via e-mail accepted, and
- Purchase Order 1 copy, electronic copy via e-mail accepted
MANDATORY DOCUMENTS FOR FIRST TIME ORDER FROM THIS VENDOR ONLY
- Mentor Graphics End User Agreement for Academic Institutes TWO copies each with signatures in ink, electronic copies NOT accepted, paper originals must be sent to the Microelectronics Support Centre via courier recommended, see Order form for address, or
- Mentor Graphics End User Agreement for Research Laboratories Instructions as per Agreement for Academic Institutes
- Mentor Graphics Optional Package Order Form (login required) 1 copy, electronic copy via e-mail accepted
STATEMENT FROM RESEARCH LABORATORIES
- End Usage Statement for Vendor Approval required when ordering first licenses of any new license bundle, 1 copy, electronic copy via e-mail accepted, can be sent in advance of other paperwork
PLEASE ENSURE that you read the End User Agreement Notes before downloading the End User Agreements
- Software price list (login required)
- Maintenance price list (login required)
- Software Versions and Operating Systems
|Europractice membership and design tools access is managed by STFC at the Microelectronics Support Centre, Rutherford Appleton Laboratory, UK. You can contact the Microelectronics Support Centre by email: MicroelectronicsCentre@stfc.ac.uk
Last modified: September 18, 2017