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Imperas/OVP processor models cannot be used directly, but require a simulator. Imperas provide the "lite" simulator, OVPsim, and a fully feature simulator, Imperas M*SIM. M*SIM can also be used with third party tools, such as Cadence VSP (Virtual System Platform).
For more information on Cadence VSP, please see the Europractice Cadence webpages
Two Imperas products are available through Europractice:
OVPsim is a "lite" simulator that provides multi-core simulation, and single core debug support for OVP platforms. Please note, a FREE 60 day node-locked license license for OVPsim can be obtained via the OVPworld website
Annually renewable node-lock and floating licenses for OVPsim are available through Europractice.
M*SIM is the professional version of the Imperas Simulator and implements the complete OVP API, providing additional optimisations and capabilities compared to OVPsim.
M*SIM is required for use with Cadence VSP, as VSP relies on accessing features of the OVP API not supported by OVPsim.
Imperas/OVP Processor Models and Virtual Platforms
Virtual PlatformsVirtual Platforms are models of a system that can be created before RTL is available and are used for system partitioning, optimisation, and software development. Virtual Platforms rely on fast processor models to allow simulation speeds of 100's-1000's MIPS, allowing interactive debug and verification of embedded software. Imperas have provide processor models for over 75 processors, including ARM, ARC, MIPS and Renesas.
Imperas/OVP Processor ModelsAll Imperas/OVP Fast Processor Models support the GDB interface, and include a native SystemC/TLM-2.0 interface, enabling easy use in SystemC simulation environments. As well as processor models, platform, memory and peripheral libraries are also included.
The Peripheral Library has over 40 components that can be used to build a custom platform. Peripherals range from simple timers, to full functionality of an Ethernet controller that connects to the host ethernet port and provides network/internet access from within the simulation.
The platform library includes example platforms that can be used to boot complete operating systems.
Supported processors include:
- ARM 7, 9, 10, 11, Cortex-A, Cortex-M families
- Renesas/NEC V850, M16C
- OpenCores OR1K
- Xilinx MicroBlaze
- MIPS 4K, 24K, 34K, 74K, 1004K, 1074K, M14K - certified correct by MIPS
- ARC 600, 700. Verified by ARC, now part of Synopsys
Pleasenote that Windows and Linux ONLY are supported for licensing
The EUROPRACTICE Software Service place bulk orders with Vendors monthly. In order to be included on the monthly order, Institute orders to EUROPRACTICE must be received at RAL by no later than the 25th day of each month.
Detailed instructions on how to place a EUROPRACTICE software order, how to complete the software order forms and the financial procedures that must be followed are given in the Software Order Procedures.
New software orders, additional keys and rehost keys will be requested monthly.
PLEASE note EUROPRACTICE members wishing to purchase Imperas for the first time must complete the Imperas End User Agreement. The completed and signed document must accompany your initial Imperas software order, the document is not required when purchasing additional Imperas items. Two copies of the End User Agreement must be completed and each must contain an original signature in ink on both pack pages.
- Imperas End User Agreement for Academic Institutions
- Imperas End User Agreement for Research Laboratories
PLEASE ensure that you read the End User Agreement Notes before downloading the End User Agreements.
|The EUROPRACTICE Software Service is managed by the Microelectronics Support Centre, STFC Rutherford Appleton Laboratory, UK.
You can contact the Microelectronics Support Centre by email: MicroelectronicsCentre@stfc.ac.uk
Last modified: January 7, 2013