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Imperas provide Virtual Prototyping technology for generating Virtual Platforms that can be used for embedded software development. Imperas make available fast processor models through the OVP (Open Virtual Platforms) initiative

Imperas/OVP processor models cannot be used directly, but require a simulator. Imperas provide the "lite" simulator, OVPsim, and a fully feature simulator, Imperas M*SIM. M*SIM can also be used with third party tools, such as Cadence VSP (Virtual System Platform).

For more information on Cadence VSP, please see the Europractice Cadence webpages

Two Imperas products are available through Europractice:
  • OVPsim is a "lite" simulator that provides multi-core simulation, and single core debug support for OVP platforms. Please note, a FREE 60 day node-locked license license for OVPsim can be obtained via the OVPworld website
    Annually renewable node-lock and floating licenses for OVPsim are available through Europractice.
  • M*SIM is the professional version of the Imperas Simulator and implements the complete OVP API, providing additional optimisations and capabilities compared to OVPsim.
    M*SIM is required for use with Cadence VSP, as VSP relies on accessing features of the OVP API not supported by OVPsim.

Imperas/OVP Processor Models and Virtual Platforms

Virtual Platforms

Virtual Platforms are models of a system that can be created before RTL is available and are used for system partitioning, optimisation, and software development. Virtual Platforms rely on fast processor models to allow simulation speeds of 100's-1000's MIPS, allowing interactive debug and verification of embedded software. Imperas have provide processor models for over 150 processors, including ARM, MIPS, Renesas, PowerPC, openCores, Altera Nios II, Xilinx Microblaze and Synopsys ARC.

Imperas/OVP Processor Models

All Imperas/OVP Fast Processor Models support the GDB interface, and include a native SystemC/TLM-2.0 interface, enabling easy use in SystemC simulation environments. As well as processor models, platform, memory and peripheral libraries are also included.

The Peripheral Library has over 40 components that can be used to build a custom platform. Peripherals range from simple timers, to full functionality of an Ethernet controller that connects to the host ethernet port and provides network/internet access from within the simulation.

The platform library includes example platforms that can be used to boot complete operating systems.

Supported processors include:

  • Altera Nios II/f, Nios II/s, Nios II/e - verified with Altera test suite
  • ARM Classic: 7, 9, 10, 11; Cortex: Cortex-A, Cortex-A50, Cortex-M, Cortex-R
  • MIPS Classic: 4K, 5K, 24K, 34K, 74K, 1004K, 1074K, M14K, ISA; Aptiv generation: interAptiv, microAptiv, proAptiv; Warrior family: M5100, M5150, P5600 - verified by Imagination Technologies under the MIPS-Verified program
  • openCores OR1K
  • PowerPC mpc82x, m476, m470, m460, m440
  • Renesas V850, M16C, R8C
  • Synopsys ARC6xx, ARC7xx, ARCxx
  • Xilinx MicroBlaze - verified with Xilinx test suite

For more information on Imperas/OVP models, please see and the following datasheets:

OVP Fast Processor Models Datasheet
OVP Overview Datasheet

Please note that Windows and Linux ONLY are supported for licensing

How to Order

Orders are placed with the vendor on a single order, once per month. To be included in the current month's order, all documents including original ink-signed paper End User Agreements (if applicable) must be received by the Microelectronics Support Centre no later than the 25th day of the month.

Detailed instructions on how to place an order are given in our Order Procedures.




PLEASE ENSURE that you read the End User Agreement Notes before downloading the End User Agreements

STFC Home page The EUROPRACTICE Software Service is managed by the Microelectronics Support Centre, STFC Rutherford Appleton Laboratory, UK. You can contact the Microelectronics Support Centre by email:

Last modified: July 7, 2016